1. Field of the Invention
The present invention relates to a transmission circuit and a communication device; and more specifically relates to a transmission circuit that outputs a transmission signal that has a power level indicated by a power level signal transmitted from a predefined base station, and a communication device such as a mobile phone or the like which uses the transmission circuit.
2. Description of the Background Art
Conventionally, a transmission circuit, which includes a voltage controller that controls a voltage supplied to a power amplification transistor in a power amplifier in response to a power level signal, is suggested as a transmission circuit which is used in a communication device such as a mobile phone and the like, and which outputs a transmission signal that has a power level indicated by a power level signal transmitted from a predefined base station.
A transmission circuit 91 shown in FIG. 24 is suggested as one example of such a transmission circuit. FIG. 24 is a block diagram showing a configuration of the transmission circuit 91 which is conventional. The transmission circuit 91 is a polar modulation circuit and operates with low distortion and high efficiency. In FIG. 24, the transmission circuit 91 includes: an amplitude phase separator 911; a phase modulator 912; a collector controller 913; a power supply terminal 914; a power amplifier 915; and an output terminal 916. A power amplification transistor in the power amplifier 915 is composed of a bipolar transistor.
The amplitude phase separator 911 separates an inputted communication signal into an amplitude signal that indicates an amplitude component of the communication signal and a phase signal that indicates a phase component of the communication signal. The phase signal separated out by the amplitude phase separator 911 is inputted in the phase modulator 912, and a phase modulation is conducted on the inputted phase signal by the phase modulator 912. A phase modulation signal, which is obtained as a result of the phase modulation conducted by the phase modulator 912, is inputted into the power amplifier 915.
The amplitude signal separated out by the amplitude phase separator 911 is inputted into the collector controller 913 which is a voltage controller. A power level instruction signal is also inputted into the collector controller 913. The power level instruction signal is a signal for instructing the collector controller 913 about a power level of a transmission signal that should be outputted by the power amplifier 915; and this signal is supplied by a baseband circuit that is not diagrammatically represented. The baseband circuit generates the power level instruction signal based on the power level signal which is a signal transmitted from a predefined base station and which indicates the power level of the transmission signal that should be outputted by the power amplifier 915. The collector controller 913 controls a collector voltage Vc supplied to the power amplification transistor in the power amplifier 915 depending on the inputted amplitude signal and power level instruction signal. A DC voltage is supplied to the collector controller 913 from the power supply terminal 914.
The power amplifier 915: conducts an amplitude modulation on the phase modulation signal by amplifying the phase modulation signal by using the collector voltage Vc controlled by the collector controller 913; and matches a power level of the phase modulation signal and a power level indicated by the power level signal. The phase modulation signal, on which the amplitude modulation is conducted by the power amplifier 915, is outputted by the output terminal 916 as a transmission signal.
As described above, in the transmission circuit 91, the output power level of the power amplifier 915 is controlled by allowing the collector controller 913, which is a voltage controller, control the collector voltage Vc.
A transmission circuit 92 shown in FIG. 25 is suggested as a transmission circuit other than the transmission circuit 91 (e.g. Japanese Laid-Open Patent Publication No. 2003-243994 (hereinafter, referred to as patent document 1)). FIG. 25 is a block diagram showing a configuration of the transmission circuit 92 which is conventional. In FIG. 25, the transmission circuit 92 mainly includes: an amplitude phase separator 921; a power supply voltage controller 922; a bias voltage generator 923; a power amplifier 924; a coupler 925; a comparator 926; a switch SW1; and a switch SW2. The power amplifier 924 includes FETs for power amplification 9241 to 9243, and a bias circuit 9244.
The switch SW1 and the switch SW2 are, in response to a mode signal MODE, switched on a GSMK side when transmitting with GSMK standard, and switched on an EDGE side when transmitting with EDGE standard.
When transmission is conducted by using the GSMK standard, the power supply voltage controller 922, which is a voltage controller, controls a drain voltage Vdd1 which is supplied to the FETs for power amplification 9241 to 9243, in response to a power level instruction signal VPL. The bias voltage generator 923 generates a bias voltage Vabc based on the drain voltage Vdd1 controlled by the power supply voltage controller 922. The bias circuit 9244 supplies the gate terminals of the FETs for power amplification 9241 to 9243 with a gate bias voltage that is in accordance with the bias voltage Vabc.
When transmission is conducted by using the EDGE standard, the power supply voltage controller 922 controls the drain voltage Vdd1 which is supplied to the FETs for power amplification 9241 to 9243, in response to a signal LDO that indicates amplitude information of a communication signal from the comparator 926. The comparator 926 compares an amplitude signal Vin, which is obtained as a result of a phase amplitude isolation circuit 432 separating a communication signal into a phase signal Pin and the amplitude signal Vin, to a detection signal Vdt from the coupler 925 for power level detection provided on an output side of the power amplifier 924; and outputs a signal that is in accordance with the electrical potential difference between these signals. An output from the coupler 925 is frequency-converted by a mixer MIX, and supplied to the comparator 926 as the detection signal Vdt, via a filter FLT and an amplifier AMP.
As described above, in the transmission circuit 92, the output power level of the power amplifier 924 is controlled by allowing the power supply voltage controller 922, which is a voltage controller, to control the drain voltage Vdd1.
Required for a voltage controller of a transmission circuit used in a communication device such as a mobile phone and the like, is to further broaden a controlled bandwidth while ensuring voltage withstanding ability in order to respond to various modulation signals. However, it is difficult to further broaden a controlled bandwidth while ensuring voltage withstanding ability of the voltage controllers in the above described transmission circuit 91 and transmission circuit 92.
The reason for this will be described by using the transmission circuit 91 as an example. FIG. 26 is a figure showing a relationship between the maximum collector electric current and the controlled bandwidth, for the voltage controller in the transmission circuit 91. The maximum collector electric current shown in FIG. 26 is the maximum of a collector electric current allowed by a control transistor in the voltage controller.
The voltage controller of the transmission circuit 91 controls all bandwidths throughout the output power level of the power amplifier by only controlling the collector voltage Vc. Therefore, a variation width of a collector electric current Ic becomes, for example, a variation width shown in FIG. 26; the maximum collector electric current that should be allowed by the control transistor in the voltage controller is maximum collector electric current Ic1max; and the controlled bandwidth of the voltage controller becomes bandwidth Xa.
In order to broaden the controlled bandwidth of the voltage controller, it is necessary to reduce the size of the control transistor in the voltage controller, and subsequently reduce a parasitic capacitance of the control transistor. However, if the size of the control transistor is reduced, the maximum collector electric current allowed by the control transistor also reduces. That is, the maximum collector electric current allowed by the control transistor and the controlled bandwidth negatively correlates with each other; and a relationship between the maximum collector electric current and the controlled bandwidth becomes a relationship shown in FIG. 26.
Therefore, even if further broadening of the controlled bandwidth is attempted by expanding the controlled bandwidth of the voltage controller beyond bandwidth Xa, voltage withstanding ability of the voltage controller cannot be ensured because the maximum collector electric current allowed by the control transistor becomes smaller than the maximum collector electric current Ic1max.